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TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
Copyright (c) 1997, Power Innovations Limited, UK SEPTEMBER 1993 - REVISED SEPTEMBER 1997
TELECOMMUNICATION SYSTEM SECONDARY PROTECTION
q
Ion-Implanted Breakdown Region Precise and Stable Voltage Low Voltage Overshoot under Surge
DEVICE `1072F3 `1082F3 VDRM V - 58 - 66 V(BO) V - 72 - 82
D PACKAGE (TOP VIEW)
T NC NC R
1 2 3 4
8 7 6 5
G G G G
MDXXAE
NC - No internal connection
q
Planar Passivated Junctions Low Off-State Current < 10 A Rated for International Surge Wave Shapes
WAVE SHAPE 2/10 s 8/20 s 10/160 s 10/560 s 0.5/700 s 10/700 s 10/1000 s STANDARD FCC Part 68 ANSI C62.41 FCC Part 68 FCC Part 68 RLM 88 FTZ R12 VDE 0433 CCITT IX K17/K20 REA PE-60 ITSP A 80 70 60 45 38 50 50 50 35
P PACKAGE (TOP VIEW)
q
T G G R
1 2 3 4
8 7 6 5
T G G R
MDXXAF
Specified T terminal ratings require connection of pins 1 and 8. Specified R terminal ratings require connection of pins 4 and 5. SL PACKAGE (TOP VIEW)
T
1 2 3
MDXXAG MD1XAA
q
Surface Mount and Through-Hole Options
PACKAGE Small-outline Small-outline taped and reeled Plastic DIP Single-in-line PART # SUFFIX D DR P SL
G R
device symbol
T R
q
UL Recognized, E132482
description
These dual asymmetrical transient voltage suppressors are designed for the overvoltage protection of ICs used for the SLIC (Subscriber Line Interface Circuit) function. The IC line driver section is typically powered with 0 V and a negative supply. The TISP1xxxF3 limits voltages that exceed these supply rails and is offered in two voltage variants to match typical negative supply voltage values. High voltages can occur on the line as a result of exposure to lightning strikes and a.c. power surges. Negative transients are initially limited by breakdown clamping until the voltage rises to the
SD1XAA
G Terminals T, R and G correspond to the alternative line designators of A, B and C
breakover level, which causes the device to crowbar. The high crowbar holding current prevents d.c. latchup as the current subsides. Positive transients are limited by diode forward conduction. These protectors are guaranteed to suppress and withstand the listed international lightning surges on any terminal pair
PRODUCT
INFORMATION
Information is current as of publication date. Products conform to specifications in accordance with the terms of Power Innovations standard warranty. Production processing does not necessarily include testing of all parameters.
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TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
description (continued)
These monolithic protection devices are fabricated in ion-implanted planar structures to ensure precise and matched breakover control and are virtually transparent to the system in normal operation The small-outline 8-pin assignment has been carefully chosen for these devices to maximise the inter-pin clearance and creepage distances which are used by standards (e.g. IEC950) to establish voltage withstand ratings.
absolute maximum ratings
RATING Repetitive peak off-state voltage ( 0C < TJ <70C) Non-repetitive peak on-state pulse current (see Notes 1, 2 and 3) 1/2 s (Gas tube differential transient, open-circuit voltage wave shape 1/2 s) 2/10 s (FCC Part 68, open-circuit voltage wave shape 2/10 s) 8/20 s (ANSI C62.41, open-circuit voltage wave shape 1.2/50 s) 10/160 s (FCC Part 68, open-circuit voltage wave shape 10/160 s) 5/200 s (VDE 0433, open-circuit voltage wave shape 2 kV, 10/700 s) 0.2/310 s (RLM 88, open-circuit voltage wave shape 1.5 kV, 0.5/700 s) 5/310 s (CCITT IX K17/K20, open-circuit voltage wave shape 2 kV, 10/700 s) 5/310 s (FTZ R12, open-circuit voltage wave shape 2 kV, 10/700 s) 10/560 s (FCC Part 68, open-circuit voltage wave shape 10/560 s) 10/1000 s (REA PE-60, open-circuit voltage wave shape 10/1000 s) Non-repetitive peak on-state current (see Notes 2 and 3) 50 Hz, 1s D Package P Package SL Package Linear current ramp, Maximum ramp value < 38 A diT/dt TJ Tstg ITSM ITSP 120 80 70 60 50 38 50 50 45 35 4 6 6 250 -40 to +150 -40 to +150 A/s C C A rms A `1072F3 `1082F3 SYMBOL VDRM VALUE -58 -66 UNIT V
Initial rate of rise of on-state current, Junction temperature Storage temperature range
NOTES: 1. Further details on surge wave shapes are contained in the Applications Information section. 2. Initially the TISP must be in thermal equilibrium with 0C < TJ <70C. The surge may be repeated after the TISP returns to its initial conditions. 3. Above 70C, derate linearly to zero at 150C lead temperature.
electrical characteristics for the T and R terminals, 25C (unless otherwise noted)
TISP1072F3 PARAMETER Repetitive peak offstate current Off-state current Off-state capacitance TEST CONDITIONS MIN TYP MAX 10 10 Vd = 100 mV D Package P Package SL Package 0.08 0.06 0.02 0.5 0.4 0.3 0.08 0.06 0.02 MIN TISP1082F3 TYP MAX 10 10 0.5 0.4 0.3 UNIT
IDRM ID Coff NOTE
VD = VDRM , 0C < TJ <70C VD = 50 V f = 100 kHz, VD = 0 (see Note 4)
A A pF pF pF
4: Further details on capacitance are given in the Applications Information section.
PRODUCT
INFORMATION
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TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
electrical characteristics for the T and G and R and G terminals, 25C (unless otherwise noted)
TISP1072F3 PARAMETER Repetitive peak offstate current Breakover voltage age Breakover current Peak forward recovery voltage Forward voltage On-state voltage Holding current Critical rate of rise of off-state voltage Off-state current Off-state capacitance TEST CONDITIONS MIN TYP MAX -10 -72 -78 -0.1 3.3 3 -3 -0.15 -5 -10 Vd = 100 mV VD = 0, VD = -5 V VD = -50 V 150 65 30 240 104 48 130 55 25 -0.15 -5 -10 240 104 48 -0.6 -0.1 3.3 3 -3 -92 -0.6 MIN TISP1082F3 TYP MAX -10 -82 UNIT
IDRM V(BO) V(BO) I(BO) VFRM VF VT IH dv/dt ID Coff NOTE
VD = VDRM, 0C < TJ <70C dv/dt = -250 V/ms, di/dt < -20 A/s dv/dt = -250 V/ms, dv/dt = 1000 V/s, diF /dt < 20 A/s IT = 5 A, IT = -5 A, tW = 100 s tW = 100 s RSOURCE = 300 RSOURCE = 50 , RSOURCE = 300 RSOURCE = 50 ,
A V V A V V V A kV/s A pF pF pF
Impulse breakover volt- dv/dt = -1000 V/s,
di/dt = +30 mA/ms Linear voltage ramp Maximum ramp value < 0.85VDRM VD = -50 V f = 100 kHz, (see Note 5) Third terminal voltage = 0
5: Further details on capacitance are given in the Applications Information section.
thermal characteristics
PARAMETER TEST CONDITIONS Ptot = 0.8 W, TA = 25C 5 cm2, FR4 PCB D Package P Package SL Package MIN TYP MAX 160 100 105 C/W UNIT
RJA
Junction to free air thermal resistance
PRODUCT
INFORMATION
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TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
PARAMETER MEASUREMENT INFORMATION
+i ITSP Quadrant I Forward Conduction Characteristic
ITSM IF VF
V(BR)M -v I(BR) V(BR) I(BO) VDRM IDRM IH VD ID +v
V(BO)
VT IT ITSM
Quadrant III Switching Characteristic ITSP -i
PMXXAC
Figure 1. VOLTAGE-CURRENT CHARACTERISTIC FOR TERMINALS R AND G OR T AND G
+i ITSP Quadrant I Switching Characteristic
ITSM IT VT IH V(BR)M -v I(BR) V(BR) I(BO) VDRM IDRM IH VD ID ID VD VDRM V(BR)M IDRM V(BR) I(BR) +v
V(BO)
I(BO)
V(BO)
VT IT ITSM
Quadrant III Switching Characteristic ITSP -i
PMXXAA
Figure 2. VOLTAGE-CURRENT CHARACTERISTIC FOR TERMINALS R AND T
PRODUCT
INFORMATION
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TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
TYPICAL CHARACTERISTICS R and G, or T and G terminals
OFF-STATE CURRENT vs JUNCTION TEMPERATURE
100 VD = -50 V Negat ve Breakdown Vo tages - V 80.0
TC1LAF
BREAKDOWN VOLTAGES vs JUNCTION TEMPERATURE
TC1LAL
I(BR) = 1 mA V(BO)
'1082F3
10 ID - Off-State Current - A
1
V(BR) 70.0 V(BR)M '1072F3 V(BO)
0*1
0*01
60.0 V(BR)M
V(BR)
0*001 -25 0 25 50 75 100 125 150 -25 0 25 50 75 100 125 150 TJ - Junction Temperature - C TJ - Junction Temperature - C
Figure 3.
Figure 4.
ON-STATE CURRENT vs ON-STATE VOLTAGE
100
TC1LAC
FORWARD CURRENT vs FORWARD VOLTAGE
100
TC1LAE
25C IT - On-State Current - A IF - Forward Current - A 150C -40C 10
10
25C 150C 1 1 2 3 4 5 6 7 8 9 10 VT - On-State Voltage - V -40C 1 1 2 3 4 5 6 7 8 9 10 VF - Forward Voltage - V
Figure 5.
Figure 6.
PRODUCT
INFORMATION
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TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
TYPICAL CHARACTERISTICS R and G, or T and G terminals
HOLDING CURRENT & BREAKOVER CURRENT vs JUNCTION TEMPERATURE
IH, I(BO) - Holding Current, Breakover Current - A 1*0 0*9 0*8 0*7 0*6 0*5 0*4 0*3 IH 0*2 I(BO)
TC1LAD
NORMALISED BREAKOVER VOLTAGE vs RATE OF RISE OF PRINCIPLE CURRENT
2.0 1.9 Normalised Breakover Voltage 1.8 1.7 1.6 1.5 1.4 1.3 1.2
TC1LAG
0*1 0*09 0*08 0*07 -25 0 25 50 75 100 125 150 TJ - Junction Temperature - C
1.1 1.0 0*001
0*01
0*1
1
10
100
di/dt - Rate of Rise of Principle Current - A/s
Figure 7.
Figure 8.
PEAK FORWARD RECOVERY VOLTAGE vs RATE OF RISE OF PRINCIPLE CURRENT
10.0 VFRM - Peak Forward Recovery Voltage - V 9.0 8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0.0 0*001 Off-State Capacitance - pF 100
TC1LAH
OFF-STATE CAPACITANCE vs R or T TERMINAL VOLTAGE (NEGATIVE)
200
TC1LAJ
Third Terminal = 0 to -50 V
'1072F3 '1082F3
0*01
0*1
1
10
100
10 0*1
1
10
50
di/dt - Rate of Rise of Principle Current - A/s
R or T Terminal Voltage (Negative) - V
Figure 9.
Figure 10.
PRODUCT
INFORMATION
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TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
TYPICAL CHARACTERISTICS R and G, or T and G terminals
OFF-STATE CAPACITANCE vs R or T TERMINAL VOLTAGE (POSITIVE)
200 Third Terminal = 0 to -50 V
TC1LAK
OFF-STATE CAPACITANCE vs JUNCTION TEMPERATURE
500 Third Terminal = 0 to -50 V Terminal Bias = 0
TC1LAB
Off-State Capacitance - pF
Off-State Capacitance - pF
'1072F3 150 '1082F3
'1072F3 100 '1082F3
'1072F3 '1082F3
Terminal Bias = -50 V
100 0*01
10 0*1 R or T Terminal Voltage (Positive) - V 0*3 -25 0 25 50 75 100 125 150 TJ - Junction Temperature - C
Figure 11.
Figure 12.
SURGE CURRENT vs DECAY TIME
1000
TC1LAA
Maximum Surge Current - A
100
10 2 10 100 Decay Time - s 1000
Figure 13.
PRODUCT
INFORMATION
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TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
TYPICAL CHARACTERISTICS R and T terminals
OFF-STATE CURRENT vs JUNCTION TEMPERATURE
100 VD = 50 V
TC1LAN
BREAKDOWN VOLTAGES vs JUNCTION TEMPERATURE
90.0 I(BR) = 1 mA V(BO)
TC1LAM
10 ID - Off-State Current - A Breakdown Vo tages - V 80.0
'1082F3 V(BR)M
1
V(BR)
0*1
V(BO) 70.0 '1072F3 V(BR)M V(BR)
0*01
0*001 -25 0 25 50 75 100 125 150 TJ - Junction Temperature - C
60.0 -25 0 25 50 75 100 125 150 TJ - Junction Temperature - C
Figure 14.
Figure 15.
HOLDING CURRENT & BREAKOVER CURRENT vs JUNCTION TEMPERATURE
IH, I(BO) - Holding Current, Breakover Current - A 1*0 0*9 0*8 0*7 0*6 0*5 0*4 0*3 IH 0*2 I(BO)
TC1LAO
NORMALISED BREAKOVER VOLTAGE vs RATE OF RISE OF PRINCIPLE CURRENT
2.0 1.9 Normalised Breakover Voltage 1.8 1.7 1.6 1.5 1.4 1.3 1.2
TC1LAI
0*1 0*09 0*08 0*07 -25 0 25 50 75 100 125 150 TJ - Junction Temperature - C
1.1 1.0 0*001
0*01
0*1
1
10
100
di/dt - Rate of Rise of Principle Current - A/s
Figure 16.
Figure 17.
PRODUCT
INFORMATION
8
TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
TYPICAL CHARACTERISTICS R and T terminals
OFF-STATE CAPACITANCE vs TERMINAL VOLTAGE
100 90 80 70 60 Off-State Capacitance - fF 50 40 30 SL Package 20 VG > VR or VT Both Voltage Polarities 10 0*1 1 Terminal Voltage - V 10 50
TC1LAP
P Package
D Package
Figure 18.
THERMAL INFORMATION
MAXIMUM NON-RECURRING 50 Hz CURRENT vs CURRENT DURATION
TI1LAA
THERMAL RESPONSE
TI1MAA
ITRMS - Maximum Non-Recurrent 50 Hz Current - A
VGEN = 250 Vrms ZJ - Transient Thermal Impedance - C/W RGEN = 10 to 150 10 SL Package 100
D Package P Package
P Package
10
SL Package
D Package 1 0*1
1
10
100
1000
1 0*0001 0*001
0*01
0*1
1
10
100
1000
t - Current Duration - s
t - Power Pulse Duration - s
Figure 19.
Figure 20.
PRODUCT
INFORMATION
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TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
APPLICATIONS INFORMATION
electrical characteristics
The electrical characteristics of a TISP are strongly dependent on junction temperature, TJ. Hence a characteristic value will depend on the junction temperature at the instant of measurement. The values given in this data sheet were measured on commercial testers, which generally minimise the temperature rise caused by testing. Application values may be calculated from the parameters' temperature coefficient, the power dissipated and the thermal response curve ,Z (see M. J. Maytum, "Transient Suppressor Dynamic Parameters."TI Technical Journal, vol. 6, No. 4, pp.63-70, July-August 1989).
lightning surge
wave shape notation Most lightning tests, used for equipment verification, specify a unidirectional sawtooth waveform which has an exponential rise and an exponential decay. Wave shapes are classified in terms of peak amplitude (voltage or current), rise time and a decay time to 50% of the maximum amplitude. The notation used for the wave shape is amplitude, rise time/decay time. A 50A, 5/310 s wave shape would have a peak current value of 50 A, a rise time of 5 s and a decay time of 310 s. The TISP surge current graph comprehends the wave shapes of commonly used surges. generators There are three categories of surge generator type, single wave shape, combination wave shape and circuit defined. Single wave shape generators have essentially the same wave shape for the open circuit voltage and short circuit current (e.g. 10/1000 s open circuit voltage and short circuit current). Combination generators have two wave shapes, one for the open circuit voltage and the other for the short circuit current (e.g. 1.2/50 s open circuit voltage and 8/20 s short circuit current) Circuit specified generators usually equate to a combination generator, although typically only the open circuit voltage waveshape is referenced (e.g. a 10/700 s open circuit voltage generator typically produces a 5/310 s short circuit current). If the combination or circuit defined generators operate into a finite resistance the wave shape produced is intermediate between the open circuit and short circuit values. current rating When the TISP switches into the on-state it has a very low impedance. As a result, although the surge wave shape may be defined in terms of open circuit voltage, it is the current wave shape that must be used to assess the required TISP surge capability. As an example, the CCITT IX K17 1.5 kV, 10/700 s surge is changed to a 38 A, 5/310 s waveshape when driving into a short circuit. Thus the TISP surge current capability, when directly connected to the generator, will be found for the CCITT IX K17 waveform at 310 s on the surge graph and not 700 s. Some common short circuit equivalents are tabulated below: STANDARD CCITT IX K17 CCITT IX K20 RLM88 VDE 0433 FTZ R12 OPEN CIRCUIT VOLTAGE 1.5 kV, 10/700 s 1 kV, 10/700 s 1.5 kV, 0.5/700 s 2.0 kV, 10/700 s 2.0 kV, 10/700 s SHORT CIRCUIT CURRENT 38 A, 5/310 s 25 A, 5/310 s 38 A, 0.2/310 s 50 A, 5/200 s 50 A, 5/310 s
Any series resistance in the protected equipment will reduce the peak circuit current to less than the generators' short circuit value. A 2 kV open circuit voltage, 50 A short circuit current generator has an effective output impedance of 40 (2000/50). If the equipment has a series resistance of 25 then the surge current requirement of the TISP becomes 31 A (2000/65) and not 50 A.
PRODUCT
INFORMATION
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TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
APPLICATIONS INFORMATION
protection voltage
The protection voltage, (V(BO) ), increases under lightning surge conditions due to thyristor regeneration. This increase is dependent on the rate of current rise, di/dt, when the TISP is clamping the voltage in its breakdown region. The V(BO) value under surge conditions can be estimated by multiplying the 50 Hz rate V(BO) (250 V/ms) value by the normalised increase at the surge's di/dt (Figure 8.) . An estimate of the di/dt can be made from the surge generator voltage rate of rise, dv/dt, and the circuit resistance.
As an example, the CCITT IX K17 1.5 kV, 10/700 s surge has an average dv/dt of 150 V/s, but, as the rise is exponential, the initial dv/dt is higher, being in the region of 450 V/s. The instantaneous generator output resistance is 25 . If the equipment has an additional series resistance of 20 , the total series resistance becomes 45 . The maximum di/dt then can be estimated as 450/45 = 10 A/s. In practice the measured di/dt and protection voltage increase will be lower due to inductive effects and the finite slope resistance of the TISP breakdown region.
capacitance
off-state capacitance
The off-state capacitance of a TISP is sensitive to junction temperature, TJ , and the bias voltage, comprising of the dc voltage, VD , and the ac voltage, Vd . All the capacitance values in this data sheet are measured with an ac voltage of 100 mV. The typical 25C variation of capacitance value with ac bias is shown in Figure 21. When VD >> Vd the capacitance value is independent on the value of Vd . The capacitance is essentially constant over the range of normal telecommunication frequencies.
NORMALISED CAPACITANCE vs RMS AC TEST VOLTAGE
1.05
AIXXAA
1.00 Normalised Capacitance
0.95
0.90
0.85
0.80 Normalised to Vd = 100 mV DC Bias, VD = 0 0.70 1 10 100 1000 Vd - RMS AC Test Voltage - mV
0.75
Figure 21.
PRODUCT
INFORMATION
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TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
APPLICATIONS INFORMATION
longitudinal balance
Figure 22 shows a three terminal TISP with its equivalent "delta" capacitance Each capacitance, CTG , CRG and CTR , is the true terminal pair capacitance measured with a three terminal or guarded capacitance bridge. If wire R is biased at a larger potential than wire T then CTG > CRG . Capacitance CTG is equivalent to a capacitance of CRG in parallel with the capacitive difference of (CTG - C RG ). The line capacitive unbalance is due to (C TG - C RG ) and the capacitance shunting the line is CTR + CRG/2 .
Figure 22.
All capacitance measurements in this data sheet are three terminal guarded to allow the designer to accurately assess capacitive unbalance effects. Simple two terminal capacitance meters (unguarded third terminal) give false readings as the shunt capacitance via the third terminal is included.
PRODUCT
INFORMATION
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TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
MECHANICAL DATA
D008 plastic small-outline package
This small-outline package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly.
D008 5,00 (0.197) 4,80 (0.189) 8 7 6 5 Designation per JEDEC Std 30: PDSO-G8
6,20 (0.244) 5,80 (0.228)
4,00 (0.157) 3,81 (0.150)
1
2
3
4
1,75 (0.069) 1,35 (0.053)
7 NOM 3 Places
0,50 (0.020) x 45NOM 0,25 (0.010)
5,21 (0.205) 4,60 (0.181)
0,203 (0.008) 0,102 (0.004) 0,79 (0.031) 0,28 (0.011) Pin Spacing 1,27 (0.050) (see Note A) 6 Places
0,51 (0.020) 0,36 (0.014) 8 Places 0,229 (0.0090) 0,190 (0.0075)
7 NOM 4 Places
4 4
1,12 (0.044) 0,51 (0.020)
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES
MDXXAA
NOTES: A. B. C. D.
Leads are within 0,25 (0.010) radius of true position at maximum material condition. Body dimensions do not include mold flash or protrusion. Mold flash or protrusion shall not exceed 0,15 (0.006). Lead tips to be planar within 0,051 (0.002).
PRODUCT
INFORMATION
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TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
MECHANICAL DATA
P008 plastic dual-in-line package
This dual-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions The package is intended for insertion in mounting-hole rows on 7,62 (0.300) centers. Once the leads are compressed and inserted, sufficient tension is provided to secure the package in the board during soldering. Leads require no additional cleaning or processing when used in soldered assembly.
P008 10,2 (0.400) MAX 8 7 6 5 Designation per JEDEC Std 30: PDIP-T8
Index Dot C L 7,87 (0.310) 7,37 (0.290) T.P. 6,60 (0.260) 6,10 (0.240) C L
1
2
3
4
1,78 (0.070) MAX 4 Places
5,08 (0.200) MAX Seating Plane 0,51 (0.020) MIN 105 90 8 Places
3,17 (0.125) MIN 2,54 (0.100) T.P. 6 Places (see Note A) 0,533 (0.021) 0,381 (0.015) 8 Places
0,36 (0.014) 0,20 (0.008) 8 Places
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES NOTE A: Each pin centerline is located within 0,25 (0.010) of its true longitudinal position
MDXXABA
PRODUCT
INFORMATION
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TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
MECHANICAL DATA
SL003 3-pin plastic single-in-line package
This single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly.
SL003 10,2 (0.400) MAX 4,57 (0.180) MAX
8,31 (0.327) MAX Index Dot 12,9 (0.492) MAX
6,60 (0.260) 6,10 (0.240)
4,267 (0.168) MIN 1 2 3 Pin Spacing 2,54 (0.100) T.P. (see Note A) 2 Places
1,854 (0.073) MAX
0,356 (0.014) 0,203 (0.008) 3 Places
0,711 (0.028) 0,559 (0.022) 3 Places
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES NOTES: A. Each pin centerline is located within 0,25 (0.010) of its true longitudinal position. B. Body molding flash of up to 0,15 (0.006) may occur in the package lead plane.
MDXXAD
PRODUCT
INFORMATION
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TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
MECHANICAL DATA
D008 tape dimensions
D008 Package (8 pin SOIC) Single-Sprocket Tape
4,10 3,90 8,05 7,95 2,05 1,95
1,60 1,50 0,40 0,8 MIN.
5,55 5,45
12,30 11,70
6,50 6,30 Carrier Tape Embossment
o 1,5 MIN.
0 MIN. Direction of Feed 2,2 2,0
Cover Tape
ALL LINEAR DIMENSIONS IN MILLIMETERS
NOTES: A. Taped devices are supplied on a reel of the following dimensions:Reel diameter: Reel hub diameter: Reel axial hole: B. 2500 devices are on a reel. 330 +0,0/-4,0 mm 100 2,0 mm 13,0 0,2 mm
MDXXAT
PRODUCT
INFORMATION
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TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
IMPORTANT NOTICE
Power Innovations Limited (PI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to verify, before placing orders, that the information being relied on is current. PI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with PI's standard warranty. Testing and other quality control techniques are utilized to the extent PI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except as mandated by government requirements. PI accepts no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor is any license, either express or implied, granted under any patent right, copyright, design right, or other intellectual property right of PI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS.
Copyright (c) 1997, Power Innovations Limited
PRODUCT
INFORMATION
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Price & Availability of TISP1072F3

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